What a Mid-level } should know

Applies algorithm optimization for embedded: fixed-point arithmetic, lookup tables instead of computation, loop unrolling. Analyzes time complexity considering cache effects.

Implements async patterns in embedded: interrupt-driven I/O, DMA completion callbacks, event-driven state machines. Manages shared state between ISR and main loop.

Maintains embedded code quality: static analysis (PC-lint, Coverity), MISRA C compliance checking, complexity metrics. Configures quality gates in CI.

Implements data structures for embedded: statically-allocated ring buffers, memory pools, intrusive linked lists. Optimizes for cache locality and deterministic performance.

Manages memory in embedded systems: static allocation strategies, memory pool implementations, MPU configuration for memory protection. Detects and prevents memory leaks.

Implements concurrent embedded systems: RTOS task management, mutex/semaphore synchronization, priority ceiling protocol. Detects and resolves priority inversion and deadlocks.

Designs CI/CD pipelines from scratch. Configures caching to speed up builds. Uses matrix builds for testing on different versions. Sets up deployment pipelines (staging → production). Works with secrets and environment variables.

Tests embedded code independently: Unity/CMock for C unit tests, test doubles for hardware dependencies, coverage analysis. Integrates tests into CI pipeline.

Reviews embedded code: checks memory safety, interrupt correctness, peripheral configuration. Gives well-reasoned feedback.

Applies Git workflow: feature branches, interactive rebase, cherry-pick for hotfixes. Uses git submodules for HAL/SDK dependencies.

Independently develops bare-metal firmware: PLL configuration, peripheral setup through registers, boot sequence implementation on Cortex-M.

Independently develops BLE devices: custom GATT services, bonding/pairing, connection parameter optimization. Analyzes packets through sniffer.

Independently writes peripheral drivers in C for STM32/nRF52. Uses volatile, bitmasks, direct register access through CMSIS.

Applies C++17 for embedded: constexpr computations, type-safe register wrappers, CRTP for HAL. Avoids dynamic allocation and exceptions.

Applies advanced debugging: ITM trace, SWO viewer, Segger RTT, watchpoints on memory access. Uses oscilloscope for timing analysis.

Independently configures GPIO alternate functions, ADC with DMA multi-channel scan, DAC with timer trigger. Calibrates ADC for precise measurements.

Implements MQTT communications: QoS 1/2, retained messages, last will, topic hierarchy design. Optimizes reconnect and keep-alive for unstable networks.

Independently develops real-time systems: priority-based scheduling, deadline monitoring, jitter analysis. Implements watchdog timers and timing constraint verification.

Independently develops on RTOS: task decomposition, inter-task communication (queues, semaphores, event groups), priority inversion prevention. Configures FreeRTOS for specific hardware.

Independently implements SPI/I2C/UART drivers: DMA transfers, error handling, multi-slave bus management. Debugs communication issues using logic analyzer.

Applies advanced profiling: Segger SystemView for task profiling, ETM trace for instruction-level analysis, hotspot detection.

Optimizes latency: interrupt prioritization, code placement in RAM (ITCM), interrupt tail-chaining, cache configuration.

Optimizes resources independently: Flash/RAM usage analysis, power profiling, code size optimization through compiler flags and linker scripts.