Domäne
Performance Engineering
Skill-Profil
Dieser Skill definiert Erwartungen über Rollen und Level.
Rollen
1
wo dieser Skill vorkommt
Stufen
5
strukturierter Entwicklungspfad
Pflichtanforderungen
0
die anderen 5 optional
Performance Engineering
Optimization
22.2.2026
Wählen Sie Ihr aktuelles Level und vergleichen Sie die Erwartungen.
Die Tabelle zeigt, wie die Tiefe von Junior bis Principal wächst.
| Rolle | Pflicht | Beschreibung |
|---|---|---|
| Systems Programmer (C/C++) | Understands low-latency principles: cache locality, branch prediction, prefetching. Measures latency of simple operations using rdtsc/perf, analyzes jitter under mentor guidance. |
| Rolle | Pflicht | Beschreibung |
|---|---|---|
| Systems Programmer (C/C++) | Designs low-latency components: applies lock-free algorithms, memory pooling, huge pages. Optimizes system calls via bypass (io_uring), configures CPU isolation and pinning. |
| Rolle | Pflicht | Beschreibung |
|---|---|---|
| Systems Programmer (C/C++) | Designs ultra-low-latency systems: kernel bypass (DPDK, SPDK), busy-polling, zero-copy I/O. Optimizes interrupt moderation, NUMA-aware allocation, eliminates jitter sources in kernel. |
| Rolle | Pflicht | Beschreibung |
|---|---|---|
| Systems Programmer (C/C++) | Defines low-latency architecture for the product platform. Establishes performance budgets for each component, conducts reviews for latency requirements compliance. |
| Rolle | Pflicht | Beschreibung |
|---|---|---|
| Systems Programmer (C/C++) | Shapes enterprise low-latency systems strategy. Defines approaches to guaranteed latency SLAs, manages infrastructure for sub-microsecond processing, mentors experts. |